The current-mirror circuit can reproduce current with an arbitrary amplification ratio, and constitute a basic analog circuit block. Therefore, the current-mirror circuit is widely used in various circuit devices. In some cases, high output impedance is required in the current-mirror circuit for correctly reproducing current.
The cascode current-mirror circuit has features such as the very high output impedance and the relatively high speed in operation. However, there is a drawback that the structure of the cascode current-mirror circuit (in which transistors are cascode-connected) reduces the voltage margin of the circuit. Therefore, cascode current-mirror circuits which overcome the above drawback and are adapted for low-voltage operation are being widely used.
FIG. 7 is a circuit diagram illustrating a conventional cascode current-mirror circuit. The cascode current-mirror circuit of FIG. 7 comprises current sources I101 and I102 and NMOS (Negative-channel Metal-oxide Semiconductor) transistors M101, M102, M111, M121, and M122.
The transistors M101 and M121 constitute a current-mirror circuit, in which the gates of the transistors M101 and M121 are connected to each other. The transistors M102 and M122 constitute a current-mirror circuit, in which the gates of the transistors M102 and M122 are connected to each other. The transistor M122 reduces the variations in the drain-source voltage of the transistor M121, and therefore increases the output impedance.
The two current sources I101 and I102 generate such bias voltages that the transistors M101, M121, M102, and M122 operate in a saturated region. In other words, the cascode current-mirror circuit of FIG. 7 needs the two current sources I101 and I102 for normal operation of the cascode current-mirror circuit.
The current outputted from the current source I101 flows through the transistors M101 and M102. The transistors M121 and M122 operate in bias states which are respectively identical to the transistors M101 and M102, and output the current Iout. The amount of the current Iout can be adjusted at a desired ratio with respect to the amount of the current outputted from the current source I101, by configuring the transistors M101, M102, M121, and M122 so that the dimension ratio between the transistors M101 and M102 and the transistors M121 and M122 is a desired value.
FIG. 8 is a block diagram of a circuit system in which the cascode current-mirror circuit of FIG. 7 is used. The circuit system of FIG. 8 includes the blocks of a bias circuit 101 and operational circuits 111 to 114. The bias circuit 101 supplies a reference current to the operational circuits 111 to 114. The operational circuits 111 to 114 generate reproduced currents on the basis of the reference current, and operate with the reproduced currents. Each of the operational circuits 111 to 114 contains a cascode current-mirror circuit which has an identical construction to the cascode current-mirror circuit of FIG. 7 except that the current sources I101 and I102 are removed from the cascode current-mirror circuit. The bias circuit 101 contains the current sources I101 and I102.
Since the cascode current-mirror circuit of FIG. 7 necessitates the two reference currents (generated by the current sources I101 and I102), two wiring paths are required to be arranged from the bias circuit 101 to each of the operational circuits 111 to 114, so that the area for arrangement of wirings between the bias circuit 101 and the operational circuits 111 to 114 increases.
Incidentally, in a conventionally proposed cascode current-mirror circuit, two bias voltages are generated from a single reference current by using a resistor element. (For example, see Japanese Laid-open Patent Publication No. 8-88521, which is hereinafter referred to as JPP8-88521.)
As explained above, when the conventional cascode current-mirror circuit which needs two current sources is used, the area for arrangement of wirings increases.